1. Field
The present application generally relates to optical metrology, and, more particularly, to determining position accuracy of double exposure lithography using optical metrology.
2. Related Art
Semiconductor devices/circuits are formed on semiconductor wafers by depositing and patterning layers of materials. In general, the features of the devices/circuits are formed onto the layers of deposited materials using a patterning process.
In a typical patterning process, the features of the devices/circuits are laid out, one layer at a time, on a series of photomasks (masks). The layout of the features of the devices/circuits on the masks are transferred, one mask at a time, onto the deposited layers of materials.
Shrinkage of device dimensions has led to the use of double exposure lithography. In double exposure lithography, a mask is exposed to form one set of features, then a second exposure is performed to print a shifted set of features, which interleaves with the first set of features. Misalignment of the second exposure, however, can adversely affect the performance of the devices/circuits formed from the sets of features. Thus, it is desirable to determine position accuracy of the mask in double exposure lithography.